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Crossword Puzzle
Crossword Puzzle

Arquitectura de CPUS, Paralelismo y Segmentación

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Arquitectura de CPUS, Paralelismo y Segmentación
 

Crossword Puzzle

Arquitectura de CPUS, Paralelismo y SegmentaciónOnline version

Crucigrama para poner a prueba tus conocimientos

by Yefry Garcia
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Complex Instruction set Computer

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reduced instruction set computer

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Simple Instruction Set Computing

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Arquitectura en escala micro

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Técnica que permite ejecutar varias instrucciones al mismo tiempo para aumentar el rendimiento.

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Siglas de “Instruction Level Parallelism”, se refiere a la capacidad de ejecutar múltiples instrucciones dentro de un mismo hilo.

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Siglas de “Thread Level Parallelism”, se refiere a la ejecución simultánea de múltiples hilos o procesos.

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Técnica que divide la ejecución de instrucciones en etapas, como una línea de ensamblaje.

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Nombre en inglés para la segmentación de instrucciones en etapas consecutivas.

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Problema que ocurre en un pipeline cuando una instrucción depende de otra aún no completada.

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Arquitectura que permite ejecutar más de una instrucción por ciclo de reloj.

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Tipo de procesador que integra varios núcleos para aprovechar el paralelismo a nivel de hilos.

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Relación entre instrucciones que puede limitar el paralelismo si una depende del resultado de otra.

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Medida del incremento de rendimiento al aplicar paralelismo o segmentación.

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